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Application Note 9762
Appendix B Schematic Diagrams
(Continued)
+5V D
+
1
CLK IN
J2
C42
0.1 μ F
C38
0.1 μ F
13
U3
AC04
C14 C34
4.7 μ F 0.1 μ F
U7
12
14
2
CLK1
R12
56.2
L1
1.5 μ H
U7
9
7
AC04
8
(CLK)
+5V D
+
VR2
1(CCW)
2
AC04
1.0K
3(CW)
C40 C41
4.7 μ F 0.1 μ F
R11
100
C37
0.1 μ F
U7
11
10
AC04
CLK3
(CLK)
U7
3
4
AC04
U7
E9 E10
AGND
TEST
POINT
TP1
TP3
DGND
TEST
POINT
TP2
TP4
5
6
AC04
E1
E2
CLK4
(CLK)
FB5
FB1
+5V AIN
+5V A
+5V DIN
+5V D
AGND
+
C44
4.7 μ F
C43
0.1 μ F
(REFERENCE
DGND
+
C16 C15
4.7 μ F 0.1 μ F
(SAMPLE CLOCK
GENERATOR)
VOLTAGE GENERATOR OP-AMP,
BANDGAP REFERENCE)
E11 E12
E5
E6
+5V A1IN
AGND
+
FB6
C46 C45
4.7 μ F 0.1 μ F
+5V A1 (A/D AV CC )
+5V D1IN
DGND
+
FB3
C20 C19
4.7 μ F 0.1 μ F
+5V D1
(A/D DV CC1 )
AGND AND DGND TIE TOGETHER
AT A SINGLE POINT WHERE
THE POWER SUPPLIES
C17
-5V AIN
AGND
E7
E8
+
C36
4.7 μ F
FB4
C39
0.1 μ F
ENTER THE PWB
-5V A
(REFERENCE
VOLTAGE GENERATOR OP AMPS,
+5V D2IN
DGND
E3
E4
+
FB2
C18
4.7 μ F 0.1 μ F
+5V D2
(+5V/+3V)
(A/D DV CC2 )
BANDGAP REFERENCE)
3-11
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